10 design English-speaking jobs in Fundão

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  • Capgemini Engineering
  • Fundão
  • September 2
Key Responsabilities Layout design for RF circuits such as LNAs, mixers, VCOs, and PLL sub-blocks in ... The candidate will design layouts for high-frequency analog/RF blocks, ensuring optimal performance under ... industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design ... multi-patterning constraints for RF metal layers YOUR PROFILE Minimum 5 years hands-on experience in RF layout design
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  • Capgemini Engineering
  • Fundão
  • August 25
Support design bring-up, integration, and tape-out activities. ... Understanding of verification methodologies and design flows. ... Solid understanding of SoC design methodologies and integration. ... Hands-on experience with Lint, CDC, and Low Power design methodologies. ... Proven experience in microarchitecture definition and complex digital design development.
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  • Capgemini Engineering
  • Fundão
  • October 16
coordination, and delivery of complex telecommunications projects, ensuring successful execution across Design
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  • Capgemini Engineering
  • Fundão
  • August 22
The candidate will design and implement analog layouts for advanced nodes, ensuring compliance with design ... industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design ... Understanding of reliability mechanisms (BTI, HCI) and guard-banding in layout Experience with advanced-node design ... multi-patterning constraints (SADP/SAQP) YOUR PROFILE Minimum 5 years of hands-on experience in FinFET layout design
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  • Capgemini Engineering
  • Fundão
  • August 22
The candidate will design and implement analog layouts for advanced nodes, ensuring compliance with design ... industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design ... Understanding of reliability mechanisms (BTI, HCI) and guard-banding in layout Experience with advanced-node design ... multi-patterning constraints (SADP/SAQP) YOUR PROFILE Minimum 5 years of hands-on experience in FinFET layout design
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  • Capgemini Engineering
  • Fundão
  • August 18
Key Responsibilities Layout design for RF circuits such as LNAs, mixers, VCOs, and PLL sub-blocks in ... The candidate will design layouts for high-frequency analog/RF blocks, ensuring optimal performance under ... industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design ... multi-patterning constraints for RF metal layers YOUR PROFILE Minimum 5 years hands-on experience in RF layout design
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  • Capgemini Engineering
  • Fundão
  • September 3
documentation, including: Validation Plans (VP) User Requirement Specifications (URS) Functional and Design ... industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design
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  • Capgemini Engineering
  • Fundão
  • September 12
documentation, including: Validation Plans (VP) User Requirement Specifications (URS) Functional and Design
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  • Capgemini Engineering
  • Fundão
  • October 11
planning activities, milestone tracking, risk management, and deployment governance Coordinate with Design
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  • Capgemini Engineering
  • Fundão
  • October 1
industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design
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